<code>


-- data_input( * ) indices are the register numbers

-- All DIFF_bus_in  pairs have external termination

-- All DIFF_bus_out pairs have internal termination

-- All SNGL_bus_*   pairs have internal termination

-- Each group of data_input( * ) counts is separated from other groups by blank lines


        Register order           DUT output pair              DUT Input pair
        ==========================================================================================================================

        -- Bank 38 and Bank 37

        data_input(   0  )  <=   DIFF_map_out( 12 )  ;   <=   DIFF_bus_in(  12  )    -- Both   from Bank 38
        data_input(   1  )  <=   SNGL_map_out( 39 )  ;	 <=   DIFF_bus_in(  12  )    -- Input  from Bank 38 ; Output from Bank 37 ; 
        data_input(   2  )  <=   SNGL_map_in(  10 )  ;	 <=   DIFF_bus_in(  12  )    -- Input  from Bank 38 ; Output from Bank 37 ; 
							                                                        
        data_input(   3  )  <=   DIFF_map_out( 17 )  ;	 <=   DIFF_bus_in(   7  )    -- Both   from Bank 38			    
        data_input(   4  )  <=   SNGL_map_out( 40 )  ;	 <=   DIFF_bus_in(   7  )    -- Input  from Bank 38 ; Output from Bank 37 ; 
        data_input(   5  )  <=   SNGL_map_out( 41 )  ;	 <=   DIFF_bus_in(   7  )    -- Input  from Bank 38 ; Output from Bank 37 ; 

        -- Bank 37 only

        data_input(   6  )  <=   DIFF_map_out( 16 )  ;   <=   DIFF_bus_in(   2  )
        data_input(   7  )  <=   SNGL_map_in(  11 )  ;	 <=   DIFF_bus_in(   2  )
							                         
        data_input(   8  )  <=   DIFF_map_out(  7 )  ;	 <=   DIFF_bus_in(  17  )
        data_input(   9  )  <=   SNGL_map_out( 42 )  ;	 <=   DIFF_bus_in(  17  )

        -- Bank 11

        data_input(  10  )  <=   SNGL_map_out( 21 )  ;   <=   DIFF_bus_in(   3  )
        data_input(  11  )  <=   SNGL_map_out( 22 )  ;	 <=   DIFF_bus_in(   3  )
        data_input(  12  )  <=   SNGL_map_in(   5 )  ;	 <=   DIFF_bus_in(   3  )
							                         
        data_input(  13  )  <=   SNGL_map_out( 23 )  ;	 <=   DIFF_bus_out( 13  )
        data_input(  14  )  <=   SNGL_map_out( 24 )  ;	 <=   DIFF_bus_out( 13  )
        data_input(  15  )  <=   SNGL_map_out( 25 )  ;	 <=   DIFF_bus_out( 13  )

        -- End of 1st column

        -- Bank 18

        data_input(  16  )  <=   DIFF_map_out(  5 )  ;   <=   DIFF_bus_in(   5  )
        data_input(  17  )  <=   SNGL_map_out(  0 )  ;	 <=   DIFF_bus_in(   5  )
        data_input(  18  )  <=   SNGL_map_out(  1 )  ;	 <=   DIFF_bus_in(   5  )
							                         
        data_input(  19  )  <=   DIFF_map_out( 10 )  ;	 <=   DIFF_bus_in(  10  )
        data_input(  20  )  <=   SNGL_map_in(   0 )  ;	 <=   DIFF_bus_in(  10  )
        data_input(  21  )  <=   SNGL_map_out(  2 )  ;	 <=   DIFF_bus_in(  10  )
							                         
        data_input(  22  )  <=   DIFF_map_out( 15 )  ;	 <=   DIFF_bus_in(  15  )
        data_input(  23  )  <=   SNGL_map_out(  3 )  ;	 <=   DIFF_bus_in(  15  )

        -- Bank 17

        data_input(  24  )  <=   DIFF_map_out( 14 )  ;   <=   DIFF_bus_in(   4  )
        data_input(  25  )  <=   SNGL_map_out(  4 )  ;	 <=   DIFF_bus_in(   4  )
        data_input(  26  )  <=   SNGL_map_out(  5 )  ;	 <=   DIFF_bus_in(   4  )

        data_input(  27  )  <=   DIFF_map_out( 19 )  ;   <=   DIFF_bus_in(   0  )
        data_input(  28  )  <=   SNGL_map_in(   1 )  ;	 <=   DIFF_bus_in(   0  )
        data_input(  29  )  <=   SNGL_map_out(  6 )  ;	 <=   DIFF_bus_in(   0  )

        data_input(  30  )  <=   DIFF_map_out(  1 )  ;   <=   DIFF_bus_in(  20  )
        data_input(  31  )  <=   SNGL_map_out(  7 )  ;	 <=   DIFF_bus_in(  20  )

        -- End of 2nd column

        -- Bank 13

        data_input(  32  )  <=   SNGL_map_out( 11 )  ;   <=   DIFF_bus_in(  13  )
        data_input(  33  )  <=   SNGL_map_out( 12 )  ;	 <=   DIFF_bus_in(  13  )
        data_input(  34  )  <=   SNGL_map_in(   3 )  ;	 <=   DIFF_bus_in(  13  )
							                         
        data_input(  35  )  <=   SNGL_map_out( 13 )  ;	 <=   DIFF_bus_out( 18  )
        data_input(  36  )  <=   SNGL_map_out( 14 )  ;	 <=   DIFF_bus_out( 18  )
        data_input(  37  )  <=   SNGL_map_out( 15 )  ;	 <=   DIFF_bus_out( 18  )

        -- Bank 12

        data_input(  38  )  <=   SNGL_map_out( 16 )  ;   <=   DIFF_bus_in(  18  )
        data_input(  39  )  <=   SNGL_map_out( 17 )  ;   <=   DIFF_bus_in(  18  )
        data_input(  40  )  <=   SNGL_map_in(   4 )  ;   <=   DIFF_bus_in(  18  )         
							                         
        data_input(  41  )  <=   SNGL_map_out( 18 )  ;   <=   DIFF_bus_out(  3  )         
        data_input(  42  )  <=   SNGL_map_out( 19 )  ;   <=   DIFF_bus_out(  3  )         
        data_input(  43  )  <=   SNGL_map_out( 20 )  ;	 <=   DIFF_bus_out(  3  )

        -- Bank 35

        data_input(  44  )  <=   DIFF_map_out( 20 )  ;   <=   DIFF_bus_in(   1  )
        data_input(  45  )  <=   SNGL_map_out( 36 )  ;	 <=   DIFF_bus_in(   1  )
							                         
        data_input(  46  )  <=   DIFF_map_out(  2 )  ;	 <=   DIFF_bus_in(  16  )
        data_input(  47  )  <=   SNGL_map_in(   8 )  ;	 <=   DIFF_bus_in(  16  )


        -- End of 3rd column

        -- Bank 10

        data_input(  48  )  <=   SNGL_map_out( 26 )  ;   <=   DIFF_bus_in(   8  )
        data_input(  49  )  <=   SNGL_map_out( 27 )  ;	 <=   DIFF_bus_in(   8  )
        data_input(  50  )  <=   SNGL_map_in(   6 )  ;	 <=   DIFF_bus_in(   8  )
							                         
        data_input(  51  )  <=   SNGL_map_out( 28 )  ;	 <=   DIFF_bus_out(  8  )
        data_input(  52  )  <=   SNGL_map_out( 29 )  ;	 <=   DIFF_bus_out(  8  )
        data_input(  53  )  <=   SNGL_map_out( 30 )  ;	 <=   DIFF_bus_out(  8  )

        -- Bank 16

        data_input(  54  )  <=   SNGL_map_out(  8 )  ;   <=   DIFF_bus_in(   9  )
        data_input(  55  )  <=   SNGL_map_in(  12 )  ;	 <=   DIFF_bus_in(   9  )
        data_input(  56  )  <=   SNGL_map_in(   2 )  ;	 <=   DIFF_bus_in(   9  )
							                         
        data_input(  57  )  <=   SNGL_map_out(  9 )  ;	 <=   DIFF_bus_out(  9  )
        data_input(  58  )  <=   SNGL_map_out( 10 )  ;	 <=   DIFF_bus_out(  9  )

        -- Bank 36

        data_input(  59  )  <=   DIFF_map_out(  6 )  ;   <=   DIFF_bus_in(  11  )
        data_input(  60  )  <=   SNGL_map_out( 37 )  ;	 <=   DIFF_bus_in(  11  )
        data_input(  61  )  <=   SNGL_map_in(   9 )  ;	 <=   DIFF_bus_in(  11  )
							                         
        data_input(  62  )  <=   DIFF_map_out( 11 )  ;	 <=   DIFF_bus_in(   6  )
        data_input(  63  )  <=   SNGL_map_out( 38 )  ;	 <=   DIFF_bus_in(   6  )
        
        -- End of 4th column ; 1st screen

	-- Bank 30
        
        data_input(  64  )  <=   DIFF_map_out(  0 )  ;   <=   DIFF_bus_in(  19  )
        data_input(  65  )  <=   SNGL_map_out( 31 )  ;	 <=   DIFF_bus_in(  19  )
        data_input(  66  )  <=   SNGL_map_out( 32 )  ;	 <=   DIFF_bus_in(  19  )
        data_input(  67  )  <=   SNGL_map_in(   7 )  ;	 <=   DIFF_bus_in(  19  )
							                         
        data_input(  68  )  <=   DIFF_map_out(  4 )  ;	 <=   DIFF_bus_in(  14  )                        
        data_input(  69  )  <=   SNGL_map_out( 33 )  ;	 <=   DIFF_bus_in(  14  )
        data_input(  70  )  <=   SNGL_map_out( 34 )  ;	 <=   DIFF_bus_in(  14  )
        data_input(  71  )  <=   SNGL_map_out( 35 )  ;	 <=   DIFF_bus_in(  14  )
        						 



</code>